Sciweavers

176 search results - page 1 / 36
» Formal Verification of Gate-Level Computer Systems
Sort
View
DAC
2010
ACM
14 years 3 months ago
Theoretical analysis of gate level information flow tracking
Understanding the flow of information is an important aspect in computer security. There has been a recent move towards tracking information in hardware and understanding the flow...
Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Tim...
BIRTHDAY
2006
Springer
14 years 2 months ago
Realistic Worst-Case Execution Time Analysis in the Context of Pervasive System Verification
We describe a gate level design of a FlexRay-like bus interface. An electronic control unit (ECU) is obtained by integrating this interface into the design of the verified VAMP pro...
Steffen Knapp, Wolfgang J. Paul
CORR
2011
Springer
216views Education» more  CORR 2011»
13 years 6 months ago
Approaches to Formal Verification of Security Protocols
— In recent times, many protocols have been proposed to provide security for various information and communication systems. Such protocols must be tested for their functional cor...
Suvansh Lal, Mohit Jain, Vikrant Chaplot
TII
2010
113views Education» more  TII 2010»
13 years 5 months ago
An Automated Framework for Formal Verification of Timed Continuous Petri Nets
In this paper, we develop an automated framework for formal verification of timed continuous Petri nets (ContPNs). Specifically, we consider two problems: (1) given an initial set ...
Marius Kloetzer, Cristian Mahulea, Calin Belta, Ma...