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» Formal Verification of Gate-Level Computer Systems
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CSEE
2000
Springer
13 years 12 months ago
Technology Transfer Issues for Formal Methods of Software Specification
Accurate and complete requirements specifications are crucial for the design and implementation of high-quality software. Unfortunately, the articulation and verification of softw...
Ken Abernethy, John C. Kelly, Ann E. Kelley Sobel,...
VLSID
2002
IEEE
152views VLSI» more  VLSID 2002»
14 years 8 months ago
Verification of an Industrial CC-NUMA Server
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
SP
1996
IEEE
140views Security Privacy» more  SP 1996»
13 years 11 months ago
A Security Model of Dynamic Labeling Providing a Tiered Approach to Verification
In the proposed mandatory access control model, arbitrary label changing policies can be expressed. The relatively simple model can capture a wide variety of security policies, in...
Simon N. Foley, Li Gong, Xiaolei Qian
STTT
2008
134views more  STTT 2008»
13 years 7 months ago
Automated verification of access control policies using a SAT solver
Abstract. Managing access control policies in modern computer systems can be challenging and error-prone. Combining multiple disparate access policies can introduce unintended cons...
Graham Hughes, Tevfik Bultan
TSMC
2010
13 years 2 months ago
Automated Modeling of Dynamic Reliability Block Diagrams Using Colored Petri Nets
Computer system reliability is conventionally modeled and analyzed using techniques such as fault tree analysis (FTA) and reliability block diagrams (RBD), which provide static rep...
Ryan Robidoux, Haiping Xu, Liudong Xing, MengChu Z...