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» Formal Verification of Gate-Level Computer Systems
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DATE
2006
IEEE
101views Hardware» more  DATE 2006»
14 years 1 months ago
Design with race-free hardware semantics
Most hardware description languages do not enforce determinacy, meaning that they may yield races. Race conditions pose a problem for the implementation, verification, and validat...
Patrick Schaumont, Sandeep K. Shukla, Ingrid Verba...
MTA
2011
220views Hardware» more  MTA 2011»
13 years 2 months ago
Modeling, simulation, and practice of floor control for synchronous and ubiquitous collaboration
: With the advances in a variety of software/hardware technologies and wireless networking, there is coming a need for ubiquitous collaboration which allows people to access inform...
Kangseok Kim, Geoffrey C. Fox
ICECCS
2007
IEEE
120views Hardware» more  ICECCS 2007»
13 years 11 months ago
Verifying the CICS File Control API with Z/Eves: An Experiment in the Verified Software Repository
Parts of the CICS transaction processing system were modelled formally in the 1980s in a collaborative project between IBM Hursley Park and Oxford University Computing Laboratory....
Leo Freitas, Konstantinos Mokos, Jim Woodcock
NSDI
2004
13 years 9 months ago
Model Checking Large Network Protocol Implementations
Network protocols must work. The effects of protocol specification or implementation errors range from reduced performance, to security breaches, to bringing down entire networks....
Madanlal Musuvathi, Dawson R. Engler
CSIE
2009
IEEE
13 years 8 months ago
On Test Script Technique Oriented Automation of Embedded Software Simulation Testing
Succinct test script with high efficiency is one of key point for automation of embedded software testing. In this paper, we integrated object technique with automated simulation ...
Yongfeng Yin, Bin Liu, Bentao Zheng