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» Formal Verification of Gate-Level Computer Systems
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IFM
2010
Springer
132views Formal Methods» more  IFM 2010»
13 years 5 months ago
From Operating-System Correctness to Pervasively Verified Applications
Though program verification is known and has been used for decades, the verification of a complete computer system still remains a grand challenge. Part of this challenge is the in...
Matthias Daum, Norbert Schirmer, Mareike Schmidt
CDC
2010
IEEE
141views Control Systems» more  CDC 2010»
13 years 2 months ago
Using computer games for hybrid systems controller synthesis
Abstract-- We propose a formal method for feedback controller synthesis using interactive computer programs with graphical interface (in short, computer games). The main theoretica...
A. Agung Julius, Sina Afshari
EUROMICRO
2000
IEEE
13 years 12 months ago
Formal Coverification of Embedded Systems Using Model Checking
The complexity of embedded systems is increasing rapidly. In consequence, new verification techniques that overcome the limitations of traditional methods and are suitable for har...
Luis Alejandro Cortés, Petru Eles, Zebo Pen...
SIGSOFT
2010
ACM
13 years 5 months ago
Top ten ways to make formal methods for HPC practical
Almost all fundamental advances in science and engineering crucially depend on the availability of extremely capable high performance computing (HPC) systems. Future HPC systems w...
Ganesh Gopalakrishnan, Robert M. Kirby
FORTE
2009
13 years 5 months ago
Approximated Context-Sensitive Analysis for Parameterized Verification
Abstract. We propose a verification method for parameterized systems with global conditions. The method is based on context-sensitive constraints, a symbolic representation of infi...
Parosh Aziz Abdulla, Giorgio Delzanno, Ahmed Rezin...