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» Formal Verification of Safety Properties in Timed Circuits
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CADE
2010
Springer
13 years 8 months ago
MCMT: A Model Checker Modulo Theories
Abstract. We describe mcmt, a fully declarative and deductive symbolic model checker for safety properties of infinite state systems whose state variables are arrays. Theories spec...
Silvio Ghilardi, Silvio Ranise
DATE
2006
IEEE
97views Hardware» more  DATE 2006»
13 years 11 months ago
Monolithic verification of deep pipelines with collapsed flushing
We introduce collapsed flushing, a new flushing-based refinement map for automatically verifying safety and liveness properties of term-level pipelined machine models. We also pre...
Roma Kane, Panagiotis Manolios, Sudarshan K. Srini...
EUROMICRO
2000
IEEE
13 years 12 months ago
Formal Coverification of Embedded Systems Using Model Checking
The complexity of embedded systems is increasing rapidly. In consequence, new verification techniques that overcome the limitations of traditional methods and are suitable for har...
Luis Alejandro Cortés, Petru Eles, Zebo Pen...
FORMATS
2008
Springer
13 years 9 months ago
Convergence Verification: From Shared Memory to Partially Synchronous Systems
Verification of partially synchronous distributed systems is difficult because of inherent concurrency and the potentially large state space of the channels. This paper identifies ...
K. Mani Chandy, Sayan Mitra, Concetta Pilotto
ENTCS
2006
142views more  ENTCS 2006»
13 years 7 months ago
Predicate Diagrams for the Verification of Real-Time Systems
We propose a format of predicate diagrams for the verification of real-time systems. We consider systems that are defined as extended timed graphs, a format that combines timed au...
Eun-Young Kang, Stephan Merz