Sciweavers

294 search results - page 43 / 59
» Formal Verification of the Implementability of Timing Requir...
Sort
View
RE
2008
Springer
13 years 8 months ago
Generating Natural Language specifications from UML class diagrams
Early phases of software development are known to be problematic, difficult to manage and errors occurring during these phases are expensive to correct. Many systems have been deve...
Farid Meziane, Nikos Athanasakis, Sophia Ananiadou
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
14 years 23 days ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli
ICFP
2010
ACM
13 years 9 months ago
VeriML: typed computation of logical terms inside a language with effects
Modern proof assistants such as Coq and Isabelle provide high degrees of expressiveness and assurance because they support formal reasoning in higher-order logic and supply explic...
Antonis Stampoulis, Zhong Shao
IPPS
2010
IEEE
13 years 5 months ago
Runtime checking of serializability in software transactional memory
Abstract--Ensuring the correctness of complex implementations of software transactional memory (STM) is a daunting task. Attempts have been made to formally verify STMs, but these ...
Arnab Sinha, Sharad Malik
ICWS
2009
IEEE
13 years 6 months ago
DIALOG: Distributed Auditing Logs
Service-oriented systems facilitate business workflows to span multiple organizations (e.g. by means of Web services). As a side effect, data may be more easily transferred over o...
Christoph Ringelstein, Steffen Staab