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» Formal analysis of hardware requirements
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CAV
2005
Springer
135views Hardware» more  CAV 2005»
14 years 2 months ago
Linear Ranking with Reachability
We present a complete method for synthesizing lexicographic linear ranking functions supported by inductive linear invariants for loops with linear guards and transitions. Proving ...
Aaron R. Bradley, Zohar Manna, Henny B. Sipma
DATE
2008
IEEE
131views Hardware» more  DATE 2008»
14 years 3 months ago
Parametric Throughput Analysis of Synchronous Data Flow Graphs
Synchronous Data Flow Graphs (SDFGs) have proved to be a very successful tool for modeling, analysis and synthesis of multimedia applications targeted at both single- and multiproc...
Amir Hossein Ghamarian, Marc Geilen, Twan Basten, ...
ACSD
2006
IEEE
105views Hardware» more  ACSD 2006»
14 years 3 months ago
Throughput Analysis of Synchronous Data Flow Graphs
Synchronous Data Flow Graphs (SDFGs) are a useful tool for modeling and analyzing embedded data flow applications, both in a single processor and a multiprocessing context or for...
Amir Hossein Ghamarian, Marc Geilen, Sander Stuijk...
ISPD
2003
ACM
151views Hardware» more  ISPD 2003»
14 years 2 months ago
Capturing crosstalk-induced waveform for accurate static timing analysis
We propose a method to capture crosstalk-induced noisy waveform for crosstalk-aware static timing analysis. The effects of capacitive coupling noise on timing are conventionally m...
Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera
CHARME
1995
Springer
120views Hardware» more  CHARME 1995»
14 years 27 days ago
Timing analysis of asynchronous circuits using timed automata
In this paper we present a method formodeling asynchronous digital circuits by timed automata. The constructed timed automata serve as \mechanical" and veri able objects for a...
Oded Maler, Amir Pnueli