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» Formal analysis of hardware requirements
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CAV
2006
Springer
132views Hardware» more  CAV 2006»
14 years 2 months ago
Symmetry Reduction for Probabilistic Model Checking
We present an approach for applying symmetry reduction techniques to probabilistic model checking, a formal verification method for the quantitative analysis of systems with stocha...
Marta Z. Kwiatkowska, Gethin Norman, David Parker
EH
2004
IEEE
149views Hardware» more  EH 2004»
14 years 2 months ago
Organization of the Information Flow in the Perception-Action Loop of Evolved Agents
Sensor evolution in nature aims at improving the acquisition of information from the environment and is intimately related with selection pressure towards adaptivity and robustnes...
Alexander S. Klyubin, Daniel Polani, Chrystopher L...
ECBS
2007
IEEE
161views Hardware» more  ECBS 2007»
14 years 6 days ago
Alert Fusion for a Computer Host Based Intrusion Detection System
Intrusions impose tremendous threats to today’s computer hosts. Intrusions using security breaches to achieve unauthorized access or misuse of critical information can have cata...
Chuan Feng, Jianfeng Peng, Haiyan Qiao, Jerzy W. R...
SIGMETRICS
2002
ACM
107views Hardware» more  SIGMETRICS 2002»
13 years 10 months ago
Passage time distributions in large Markov chains
Probability distributions of response times are important in the design and analysis of transaction processing systems and computercommunication systems. We present a general tech...
Peter G. Harrison, William J. Knottenbelt
DDECS
2007
IEEE
175views Hardware» more  DDECS 2007»
14 years 4 months ago
Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...