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FDL
2004
IEEE
15 years 8 months ago
A Formal Verification Approach for IP-based Designs
This paper proposes a formal verification methodology which is smoothly integrated with component-based system-level design, using a divide and conquer approach. The methodology a...
Daniel Karlsson, Petru Eles, Zebo Peng
ECMDAFA
2009
Springer
170views Hardware» more  ECMDAFA 2009»
15 years 11 months ago
A Model Driven Approach to the Analysis of Timeliness Properties
The need for a design language that is rigorous but accessible and intuitive is often at odds with the formal and mathematical nature of languages used for analysis. UML and Petri ...
Mohamed Ariff Ameedeen, Behzad Bordbar, Rachid Ana...
DATE
2004
IEEE
130views Hardware» more  DATE 2004»
15 years 8 months ago
Utilizing Formal Assertions for System Design of Network Processors
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Fe...
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TCS
2002
15 years 4 months ago
A unified language processing methodology
This paper discusses a mathematical concept of language that models both artificial and natural languages and thus provides a framework for a unified language processing methodolo...
Teodor Rus
AGTIVE
2007
Springer
15 years 11 months ago
Communities of Autonomous Units for Pickup and Delivery Vehicle Routing
Communities of autonomous units are being developed for formal specification and semantic analysis of systems of interacting and mobile components. The autonomous units of a commu...
Hans-Jörg Kreowski, Sabine Kuske