We report on the successful application of academic experience with formal modelling and verification techniques to an automotive scenario from the service-oriented computing doma...
Maurice H. ter Beek, Stefania Gnesi, Nora Koch, Fr...
Iterated Register Coalescing (IRC) is a widely used heuristic for performing register allocation via graph coloring. Many implementations in existing compilers follow (more or less...
This paper describes formal modeling and verification of automation systems from the system engineering point of view. Reuse of model components is the key issue in order to bring...
In this paper we present a “lightweight” visual formalism that can be used to examine the state space complexity of an interface. The method can form a basis for designing, te...
In this paper we describe a methodology for the formal verification of a DSP chip using the HOL theorem prover. We used an iterative method to specify both the behavioral and stru...