38 search results - page 5 / 8 » Formal verification of LTL formulas for SystemC designs |
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
FOSSACS
2008
Springer
13 years 9 months ago
2008
Springer
Whereas formal verification of timed systems has become a very active field of research, the idealised mathematical semantics of timed automata cannot be faithfully implemented. Se...
ICALP
2009
Springer
14 years 8 months ago
2009
Springer
The IEEE standardized Property Specification Language, PSL for short, extends the well-known linear-time temporal logic LTL with so-called semi-extended regular expressions. PSL an...
FMCAD
2006
Springer
13 years 11 months ago
2006
Springer
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
C3S2E
2010
ACM
13 years 8 months ago
2010
ACM
Propositional satisfiability solving, or SAT, is an important reasoning task arising in numerous applications, such as circuit design, formal verification, planning, scheduling or...