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» Formalizing Design Spaces: Implicit Invocation Mechanisms
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DAC
1997
ACM
13 years 11 months ago
Toward Formalizing a Validation Methodology Using Simulation Coverage
The biggest obstacle in the formal verification of large designs is their very large state spaces, which cannot be handled even by techniques such as implicit state space travers...
Aarti Gupta, Sharad Malik, Pranav Ashar
VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
14 years 7 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng
CSCW
2012
ACM
12 years 3 months ago
Organizing without formal organization: group identification, goal setting and social modeling in directing online production
A challenge for many online production communities is to direct their members to accomplish tasks that are important to the group, even when these tasks may not match individual m...
Haiyi Zhu, Robert Kraut, Aniket Kittur
SOFTWARE
1998
13 years 7 months ago
A New Way to Query GISs on the Web
BMS organizes information in abstract name spaces and lets users refer to thedatathroughtheirvalues,whileaspatialDBMSorganizesinformationinconcrete 2D geometric spaces and lets use...
Serena Coetzee, Judith Bishop
INFORMS
1998
142views more  INFORMS 1998»
13 years 7 months ago
Distributed State Space Generation of Discrete-State Stochastic Models
High-level formalisms such as stochastic Petri nets can be used to model complex systems. Analysis of logical and numerical properties of these models often requires the generatio...
Gianfranco Ciardo, Joshua Gluckman, David M. Nicol