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CGO
2006
IEEE
15 years 10 months ago
Thread-Shared Software Code Caches
Software code caches are increasingly being used to amortize the runtime overhead of dynamic optimizers, simulators, emulators, dynamic translators, dynamic compilers, and other t...
Derek Bruening, Vladimir Kiriansky, Timothy Garnet...
GLOBECOM
2006
IEEE
15 years 10 months ago
Modelling the Impact of User Mobility on the Throughput in Networks of Wireless 802.11 LANs
— The wireless LAN technology 802.11, also called Wi-Fi, offers high speed wireless Internet access for local area environments. WLANs provide much higher data rates than the mob...
Sandjai Bhulai, Robert D. van der Mei, Taoying Yua...
IEEEPACT
2006
IEEE
15 years 10 months ago
Complexity-based program phase analysis and classification
Modeling and analysis of program behavior are at the foundation of computer system design and optimization. As computer systems become more adaptive, their efficiency increasingly...
Chang-Burm Cho, Tao Li
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IEEEPACT
2006
IEEE
15 years 10 months ago
Overlapping dependent loads with addressless preload
Modern out-of-order processors with non-blocking caches exploit Memory-Level Parallelism (MLP) by overlapping cache misses in a wide instruction window. The exploitation of MLP, h...
Zhen Yang, Xudong Shi, Feiqi Su, Jih-Kwon Peir
ISCAS
2006
IEEE
162views Hardware» more  ISCAS 2006»
15 years 10 months ago
Silicon neurons that phase-lock
Abstract—We present a silicon neuron with a dynamic, active leak that enables precise spike-timing with respect to a time-varying input signal. Our neuron models the mammalian bu...
J. H. Wittig Jr., Kwabena Boahen
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