202 search results - page 23 / 41 » Framework for Fault Analysis and Test Generation in DRAMs |
SIGSOFT
2010
ACM
13 years 5 months ago
2010
ACM
During maintenance, software is modified and evolved to enhance its functionality, eliminate faults, and adapt it to changed or new platforms. In this demo, we present BERT, a too...
ISQED
2009
IEEE
14 years 2 months ago
2009
IEEE
— With continued scaling, reliability is emerging as a critical challenge for the designers of digital circuits. The challenge stems in part from the lack of computationally efï¬...
EURODAC
1994
IEEE
13 years 11 months ago
1994
IEEE
This paper presents a testability improvement method for digital systems described in VHDL behavioral specification. The method is based on testability analysis at registertransfe...
SNPD
2008
13 years 8 months ago
2008
This paper focuses on studying efficient solutions for modeling and deriving compositional tests for component-based real-time systems. In this work, we propose a coherent framewo...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
ACE analysis is a technique to provide an early reliability estimate for microprocessors. ACE analysis couples data from performance models with low level design details to identi...