202 search results - page 3 / 41 » Framework for Fault Analysis and Test Generation in DRAMs |
ASYNC
2000
IEEE
13 years 11 months ago
2000
IEEE
Fault Abstraction and Collapsing Framework for Asynchronous Circuits Philip P. Shirvani, Subhasish Mitra Center for Reliable Computing Stanford University Stanford, CA Jo C. Eberge...
ICSE
2007
IEEE-ACM
14 years 7 months ago
2007
IEEE-ACM
Policy testing and analysis are important techniques for high assurance of correct specification of access control policies. We propose a set of testing and analysis techniques fo...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Functional validation of modern microprocessors is an important and complex problem. One of the problems in functional validation is the generation of test cases that has higher p...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
— We propose an automatic test pattern generation (ATPG) framework for combinational threshold networks. The motivation behind this work lies in the fact that many emerging nanot...
ET
2002
13 years 7 months ago
2002
Due to technology scaling and increasing clock frequency, problems due to noise effects lead to an increase in design/debugging efforts and a decrease in circuit performance. This...