Sciweavers

1852 search results - page 165 / 371
» From Bi-ideals to Periodicity
Sort
View
ICCAD
2005
IEEE
131views Hardware» more  ICCAD 2005»
14 years 7 months ago
Code restructuring for improving cache performance of MPSoCs
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
Guilin Chen, Mahmut T. Kandemir
CSCW
2010
ACM
14 years 7 months ago
Gone but not forgotten: designing for disconnection in synchronous groupware
Synchronous groupware depends on the assumption that people are fully connected to the others in the group, but there are many situations (network delay, network outage, or explic...
Carl Gutwin, T. C. Nicholas Graham, Christopher Wo...
FPGA
2010
ACM
243views FPGA» more  FPGA 2010»
14 years 7 months ago
Bit-level optimization for high-level synthesis and FPGA-based acceleration
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan,...
CVPR
2010
IEEE
14 years 6 months ago
Sufficient Dimensionality Reduction for Visual Sequence Classification
When classifying high-dimensional sequence data, traditional methods (e.g., HMMs, CRFs) may require large amounts of training data to avoid overfitting. In such cases dimensional...
Alex Shyr, Raquel Urtasun, Michael Jordan
HICSS
2010
IEEE
224views Biometrics» more  HICSS 2010»
14 years 5 months ago
Finding Success in Rapid Collaborative Requirements Negotiation Using Wiki and Shaper
Defining requirements without satisfying success critical stakeholders often leads to expensive project failures. Enabling interdisciplinary stakeholders to rapidly and effectivel...
Di Wu, Da Yang, Barry W. Boehm