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ISQED
2008
IEEE
153views Hardware» more  ISQED 2008»
14 years 4 months ago
Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding
Clock meshes have found increasingly wide applications in today’s high-performance IC designs. The inherent routing redundancies associated with clock meshes lead to improved cl...
Xiaoji Ye, Min Zhao, Rajendran Panda, Peng Li, Jia...
ICC
2007
IEEE
214views Communications» more  ICC 2007»
14 years 4 months ago
Distributed ONS and its Impact on Privacy
— The EPC Network is an industry proposal to build a global information architecture for objects carrying RFID tags with Electronic Product Codes (EPC). A so-called Object Naming...
Benjamin Fabian, Oliver Günther
RTSS
2007
IEEE
14 years 4 months ago
I/O-Aware Deadline Miss Ratio Management in Real-Time Embedded Databases
Recently, cheap and large capacity non-volatile memory such as flash memory is rapidly replacing disks not only in embedded systems, but also in high performance servers. Unlike ...
Woochul Kang, Sang Hyuk Son, John A. Stankovic, Me...
GECCO
2007
Springer
179views Optimization» more  GECCO 2007»
14 years 4 months ago
A destructive evolutionary process: a pilot implementation
This paper describes the application of evolutionary search to the problem of Flash memory wear-out. The operating parameters of Flash memory are notoriously difficult to determin...
Joe Sullivan, Conor Ryan
ICNP
2006
IEEE
14 years 3 months ago
Differentiated BGP Update Processing for Improved Routing Convergence
— Internet routers today can be overwhelmed by a large number of BGP updates triggered by events such as session resets, link failures, and policy changes. Such excessive updates...
Wei Sun, Zhuoqing Morley Mao, Kang G. Shin