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CGO
2008
IEEE
15 years 10 months ago
Fast liveness checking for ssa-form programs
Liveness analysis is an important analysis in optimizing compilers. Liveness information is used in several optimizations and is mandatory during the code-generation phase. Two dr...
Benoit Boissinot, Sebastian Hack, Daniel Grund, Be...
LCTRTS
2005
Springer
15 years 9 months ago
Generation of permutations for SIMD processors
Short vector (SIMD) instructions are useful in signal processing, multimedia, and scientific applications. They offer higher performance, lower energy consumption, and better res...
Alexei Kudriavtsev, Peter M. Kogge
ICSE
2005
IEEE-ACM
16 years 4 months ago
Automatic generation and maintenance of correct spreadsheets
Existing spreadsheet systems allow users to change cells arbitrarily, which is a major source of spreadsheet errors. We propose a system that prevents errors in spreadsheets by re...
Martin Erwig, Robin Abraham, Irene Cooperstein, St...
DATE
2007
IEEE
102views Hardware» more  DATE 2007»
15 years 10 months ago
Efficient testbench code synthesis for a hardware emulator system
: - The rising complexity of modern embedded systems is causing a significant increase in the verification effort required by hardware designers and software developers, leading to...
Ioannis Mavroidis, Ioannis Papaefstathiou
SIGSOFT
2007
ACM
16 years 4 months ago
Quantitative verification: models techniques and tools
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
Marta Z. Kwiatkowska