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PPOPP
2009
ACM
16 years 4 months ago
OpenMP to GPGPU: a compiler framework for automatic translation and optimization
GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. Although a new Compute Unified Device Architecture (CUDA) programming model from N...
Seyong Lee, Seung-Jai Min, Rudolf Eigenmann
WIA
2001
Springer
15 years 8 months ago
Compilation Methods of Minimal Acyclic Finite-State Automata for Large Dictionaries
Abstract. We present a reflection on the evolution of the different methods for constructing minimal deterministic acyclic finite-state automata from a finite set of words. We ...
Jorge Graña, Francisco-Mario Barcala, Migue...
113
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HOTOS
1999
IEEE
15 years 8 months ago
Hey, You Got Your Compiler in My Operating System!
Several operating systems projects revolve around moving functionality above or below the kernel "red line" to increase flexibility or performance. We describe how a gen...
Jon Howell, Mark H. Montague
BIRTHDAY
1999
Springer
15 years 8 months ago
Compilation and Synthesis for Real-Time Embedded Controllers
Abstract. This article provides an overview over two constructive approaches to provably correct hard real-time code generation where hard real-time code is generated from abstract...
Martin Fränzle, Markus Müller-Olm
ICCD
1993
IEEE
111views Hardware» more  ICCD 1993»
15 years 8 months ago
Ravel-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...
Michael A. Riepe, João P. Marques Silva, Ka...