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VLSID
2007
IEEE
231views VLSI» more  VLSID 2007»
14 years 10 months ago
AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Ma...
OOPSLA
2010
Springer
13 years 8 months ago
From OO to FPGA: fitting round objects into square hardware?
Consumer electronics today such as cell phones often have one or more low-power FPGAs to assist with energyintensive operations in order to reduce overall energy consumption and i...
Stephen Kou, Jens Palsberg
CGO
2003
IEEE
14 years 3 months ago
Compiler Optimization-Space Exploration
To meet the performance demands of modern architectures, compilers incorporate an everincreasing number of aggressive code transformations. Since most of these transformations are...
Spyridon Triantafyllis, Manish Vachharajani, Neil ...
JAVA
1999
Springer
14 years 2 months ago
Fixing the Java Memory Model
The Java memory model described in Chapter 17 of the Java Language Specification gives constraints on how threads interact through memory. The Java memory model is hard to interp...
William Pugh
ACMSE
2006
ACM
14 years 1 months ago
Yaccscript: a platform for intersecting high-level languages
Programming paradigms are often skewed towards a particular domain of problems, thus one effective way to utilize them is through a multiparadigm approach to software development....
John Healey