Sciweavers

570 search results - page 101 / 114
» From Program Verification to Program Synthesis
Sort
View
FCCM
2011
IEEE
220views VLSI» more  FCCM 2011»
13 years 2 months ago
Reducing the Energy Cost of Irregular Code Bases in Soft Processor Systems
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
Manish Arora, Jack Sampson, Nathan Goulding-Hotta,...
DAC
2005
ACM
14 years 10 days ago
How accurately can we model timing in a placement engine?
This paper presents a novel placement algorithm for timing optimization based on a new and powerful concept, which we term differential timing analysis. Recognizing that accurate ...
Amit Chowdhary, Karthik Rajagopal, Satish Venkates...
FM
2009
Springer
155views Formal Methods» more  FM 2009»
14 years 5 months ago
Towards an Operational Semantics for Alloy
Abstract. The Alloy modeling language has a mathematically rigorous denotational semantics based on relational algebra. Alloy specifications often represent operations on a state,...
Theophilos Giannakopoulos, Daniel J. Dougherty, Ka...
FPGA
1992
ACM
176views FPGA» more  FPGA 1992»
14 years 2 months ago
Minimization of Permuted Reed-Muller Trees for Cellular Logic
The new family of Field Programmable Gate Arrays, CLI6000 from Concurrent Logic Inc realizes the truly Cellular Logic. It has been mainly designed for the realization of data path...
Li-Fei Wu, Marek A. Perkowski
CODES
2007
IEEE
14 years 2 months ago
Pointer re-coding for creating definitive MPSoC models
Today's MPSoC synthesis and exploration design flows start abstract input specification model captured in a system level design language. Usually this model is created from a...
Pramod Chandraiah, Rainer Dömer