Sciweavers

590 search results - page 114 / 118
» From Relational Specifications to Logic Programs
Sort
View
FCCM
2004
IEEE
118views VLSI» more  FCCM 2004»
13 years 11 months ago
Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
CG
2000
Springer
13 years 12 months ago
Chess Neighborhoods, Function Combination, and Reinforcement Learning
Abstract. Over the years, various research projects have attempted to develop a chess program that learns to play well given little prior knowledge beyond the rules of the game. Ea...
Robert Levinson, Ryan Weber
ICALP
1998
Springer
13 years 11 months ago
Static and Dynamic Low-Congested Interval Routing Schemes
Interval Routing Schemes (IRS for short) have been extensively investigated in the past years with special emphasis on shortest paths. Besides their theoretical interest, IRS have...
Serafino Cicerone, Gabriele Di Stefano, Michele Fl...
APLAS
2007
ACM
13 years 11 months ago
Scalable Simulation of Cellular Signaling Networks
Abstract. Given the combinatorial nature of cellular signalling pathways, where biological agents can bind and modify each other in a large number of ways, concurrent or agent-base...
Vincent Danos, Jérôme Feret, Walter F...
CASES
2004
ACM
14 years 28 days ago
Balancing design options with Sherpa
Application specific processors offer the potential of rapidly designed logic specifically constructed to meet the performance and area demands of the task at hand. Recently, t...
Timothy Sherwood, Mark Oskin, Brad Calder