Sciweavers

1448 search results - page 238 / 290
» From Requirements to Code Revisited
Sort
View
CODES
2007
IEEE
14 years 2 months ago
Simultaneous synthesis of buses, data mapping and memory allocation for MPSoC
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
Brett H. Meyer, Donald E. Thomas
KBSE
2007
IEEE
14 years 2 months ago
Improving evolutionary class testing in the presence of non-public methods
Automating the generation of object-oriented unit tests is a challenging task. This is mainly due to the complexity and peculiarities that the principles of object-orientation imp...
Stefan Wappler, Ina Schieferdecker
CODES
2006
IEEE
14 years 1 months ago
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
Martijn Coenen, Srinivasan Murali, Andrei Radulesc...
ECBS
2006
IEEE
158views Hardware» more  ECBS 2006»
14 years 1 months ago
Automated Translation of C/C++ Models into a Synchronous Formalism
For complex systems that are reusing intellectual property components, functional and compositional design correctness are an important part of the design process. Common system l...
Hamoudi Kalla, Jean-Pierre Talpin, David Berner, L...
IEEEPACT
2006
IEEE
14 years 1 months ago
Fast, automatic, procedure-level performance tuning
This paper presents an automated performance tuning solution, which partitions a program into a number of tuning sections and finds the best combination of compiler options for e...
Zhelong Pan, Rudolf Eigenmann