In current research, the minimum cycle times of finite state machines are estimated by computing the delays of the combinational logic in the finite state machines. Even though th...
William K. C. Lam, Robert K. Brayton, Alberto L. S...
For two naturals m, n such that m < n, we show how to construct a circuit C with m inputs and n outputs, that has the following property: for some 0 ≤ k ≤ m, the circuit deï...
— We propose a new probabilistic temporal logic iLTL which captures properties of systems whose state can be represented by probability mass functions (pmf’s). Using iLTL, we c...
With the current developments in CPU implementations, it becomes obvious that ever more parallel multicore systems will be used even in embedded controllers that require real-time...
The planning as heuristic search framework, initiated by the planners ASP from Bonet, Loerincs and Geffner, and HSP from Bonet and Geffner, lead to some of the most performant pla...