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» Functional Validation of Programmable Architectures
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TOG
2002
112views more  TOG 2002»
13 years 8 months ago
Ray tracing on programmable graphics hardware
Recently a breakthrough has occurred in graphics hardware: fixed function pipelines have been replaced with programmable vertex and fragment processors. In the near future, the gr...
Timothy J. Purcell, Ian Buck, William R. Mark, Pat...
CORR
2010
Springer
89views Education» more  CORR 2010»
13 years 8 months ago
Power optimized programmable embedded controller
Now a days, power has become a primary consideration in hardware design, and is critical in computer systems especially for portable devices with high performance and more functio...
M. Kamaraju, K. Lal Kishore, A. V. N. Tilak
SIGCOMM
2012
ACM
11 years 11 months ago
SP4: scalable programmable packet processing platform
We propose the demonstration of SP4, a software-based programmable packet processing platform that supports (1) stateful packet processing useful for analyzing traffic flows wit...
Harjot Gill, Dong Lin, Lohit Sarna, Robert Mead, K...
APCSAC
2004
IEEE
14 years 16 days ago
Validating Word-Oriented Processors for Bit and Multi-word Operations
We examine secure computing paradigms to identify any new architectural challenges for future general-purpose processors. Some essential security functions can be provided by diffe...
Ruby B. Lee, Xiao Yang, Zhijie Shi
ISCAS
2005
IEEE
167views Hardware» more  ISCAS 2005»
14 years 2 months ago
A 33.2M vertices/sec programmable geometry engine for multimedia embedded systems
—This paper proposes a programmable geometry engine (GE) reducing the expensive internal buffers and register files of the conventional programmable GEs and sharing datapaths of ...
Chang-Hyo Yu, Donghyun Kim, Lee-Sup Kim