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» Functional Verification of Large ASICs
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ASIAMS
2009
IEEE
13 years 11 months ago
Evolutionary-Reduced Ordered Binary Decision Diagram
—Reduced ordered binary decision diagram (ROBDD) is a memory-efficient data structure which is used in many applications such as synthesis, digital system, verification, testing ...
Hossein Moeinzadeh, Mehdi Mohammadi, Hossein Pazho...
DATE
2004
IEEE
130views Hardware» more  DATE 2004»
13 years 10 months ago
Utilizing Formal Assertions for System Design of Network Processors
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Fe...
SIGSOFT
2003
ACM
14 years 7 months ago
ARCHER: using symbolic, path-sensitive analysis to detect memory access errors
Memory corruption errors lead to non-deterministic, elusive crashes. This paper describes ARCHER (ARray CHeckER) a static, effective memory access checker. ARCHER uses path-sensit...
Yichen Xie, Andy Chou, Dawson R. Engler
TACAS
2010
Springer
255views Algorithms» more  TACAS 2010»
13 years 4 months ago
Satisfiability Modulo the Theory of Costs: Foundations and Applications
Abstract. We extend the setting of Satisfiability Modulo Theories (SMT) by introducing a theory of costs C, where it is possible to model and reason about resource consumption and ...
Alessandro Cimatti, Anders Franzén, Alberto...
BICOB
2009
Springer
13 years 4 months ago
A Biclustering Method to Discover Co-regulated Genes Using Diverse Gene Expression Datasets
We propose a two-step biclustering approach to mine co-regulation patterns of a given reference gene to discover other genes that function in a common biological process. Currently...
Doruk Bozdag, Jeffrey D. Parvin, Ümit V. &Cce...