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FPL
2007
Springer
106views Hardware» more  FPL 2007»
14 years 1 months ago
RAMP Blue: A Message-Passing Manycore System in FPGAs
We are developing a set of reusable design blocks and several prototype systems for emulation of multi-core architectures in FPGAs. RAMP Blue is the first of these prototypes and...
Alex Krasnov, Andrew Schultz, John Wawrzynek, Greg...
DAC
2000
ACM
14 years 8 months ago
COSY communication IP's
The Esprit/OMI-COSY project defines transaction-levels to set-up the exchange of IP's in separating function from architecture and body-behavior from proprietary interfaces. ...
Erwin A. de Kock, Frédéric Pé...
CASES
2000
ACM
13 years 11 months ago
Flexible instruction processors
This paper introduces the notion of a Flexible Instruction Processor (FIP) for systematic customisation of instruction processor design and implementation. The features of our app...
Shay Ping Seng, Wayne Luk, Peter Y. K. Cheung
CUZA
2002
130views more  CUZA 2002»
13 years 7 months ago
Distributed Threads in Java
In this paper we present a mechanism for serializing the execution-state of a distributed Java application that is implemented on a conventional Object Request Broker (ORB) archite...
Danny Weyns, Eddy Truyen, Pierre Verbaeten
CAD
2005
Springer
13 years 7 months ago
Creation of a unit block library of architectures for use in assembled scaffold engineering
Guided tissue regeneration is gaining importance in the field of orthopaedic tissue engineering as need and technology permits the development of site-specific engineering approac...
M. A. Wettergreen, B. S. Bucklen, Binil Starly, E....