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» Functional debugging of systems-on-chip
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POPL
2010
ACM
14 years 4 months ago
Ypnos: declarative, parallel structured grid programming
A fully automatic, compiler-driven approach to parallelisation can result in unpredictable time and space costs for compiled code. On the other hand, a fully manual approach to pa...
Dominic A. Orchard, Max Bolingbroke, Alan Mycroft
ISSTA
2009
ACM
14 years 4 months ago
Specifying the worst case: orthogonal modeling of hardware errors
During testing, the execution of valid cases is only one part of the task. Checking the behavior in boundary situations and in the presence of errors is an equally important subje...
Jewgenij Botaschanjan, Benjamin Hummel
IPPS
2008
IEEE
14 years 4 months ago
A deterministic multi-way rendezvous library for haskell
The advent of multicore processors requires mainstream concurrent programming languages with high level concurrency constructs and effective debugging techniques. Unfortunately, m...
Nalini Vasudevan, Satnam Singh, Stephen A. Edwards
SUTC
2008
IEEE
14 years 4 months ago
EvAnT: Analysis and Checking of Event Traces for Wireless Sensor Networks
Testing and verification methodologies for Wireless Sensor Networks (WSN) systems in pre-deployment are vital for a successful deployment. Increased visibility of the internal st...
Matthias Woehrle, Christian Plessl, Roman Lim, Jan...
FPL
2007
Springer
106views Hardware» more  FPL 2007»
14 years 3 months ago
RAMP Blue: A Message-Passing Manycore System in FPGAs
We are developing a set of reusable design blocks and several prototype systems for emulation of multi-core architectures in FPGAs. RAMP Blue is the first of these prototypes and...
Alex Krasnov, Andrew Schultz, John Wawrzynek, Greg...