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MICRO
2000
IEEE
68views Hardware» more  MICRO 2000»
14 years 1 months ago
Performance improvement with circuit-level speculation
Current superscalar microprocessors’ performance depends on its frequency and the number of useful instructions that can be processed per cycle (IPC). In this paper we propose a...
Tong Liu, Shih-Lien Lu
IPPS
1998
IEEE
14 years 1 months ago
A Case for Aggregate Networks
Parallel processing networks, even full crossbars, that only implement point-to-point and multicast message passing are inefficient for collective communications because multiple ...
Raymond Hoare, Henry G. Dietz
FTEDA
2007
156views more  FTEDA 2007»
13 years 8 months ago
FPGA Architecture: Survey and Challenges
Field-Programmable Gate Arrays (FPGAs) have become one of the key digital circuit implementation media over the last decade. A crucial part of their creation lies in their archite...
Ian Kuon, Russell Tessier, Jonathan Rose
CADE
2005
Springer
14 years 9 months ago
Deciding Monodic Fragments by Temporal Resolution
In this paper we study the decidability of various fragments of monodic first-order temporal logic by temporal resolution. We focus on two resolution calculi, namely, monodic tempo...
Ullrich Hustadt, Boris Konev, Renate A. Schmidt
CADE
2003
Springer
14 years 9 months ago
A Principle for Incorporating Axioms into the First-Order Translation of Modal Formulae
In this paper we present a translation principle, called the axiomatic translation, for reducing propositional modal logics with background theories, including triangular propertie...
Renate A. Schmidt, Ullrich Hustadt