With continued scaling of technology into nanometer regimes, the impact of coupling induced delay variations is significant. While several coupling-aware static timers have been pr...
Debasish Das, Kip Killpack, Chandramouli V. Kashya...
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
Program specialisation aims at improving the overall performance of programs by performing source to source transformations. A common approach within functional and logic programm...
In [7] Nash, Remmel, and Vianu have raised the question whether a logic L, already introduced by Gurevich in 1988, captures polynomial time, and they give a reformulation of this ...
Separation logic allows simple proofs of concurrent algorithms which use blocking mechanisms such as semaphores. It can even deal with non-blocking algorithms. With the addition of...