Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering

With continued scaling of technology into nanometer regimes, the impact of coupling induced delay variations is significant. While several coupling-aware static timers have been proposed, the results are often pessimistic with many false failures. We present an integrated iterative timing filtering and logic filtering based approach to reduce pessimism. We use a realistic coupling model based on arrival times and slews and show that non-iterative pessimism reduction algorithms proposed in previous research may give potentially nonconservative timing results. On a functional block from an industrial 65nm microprocessor, our algorithm produced a maximum pessimism

• Type: Conference
• Year: 2008
• Where: ASPDAC
• Authors: Debasish Das, Kip Killpack, Chandramouli V. Kashyap, Abhijit Jas, Hai Zhou
• Keywords: ASPDAC 2008, Hardware, Iterative Timing Filtering, Maximum Pessimism, Non-iterative Pessimism Reduction