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ICCAD
2010
IEEE
140views Hardware» more  ICCAD 2010»
13 years 6 months ago
Reduction of interpolants for logic synthesis
Craig Interpolation is a state-of-the-art technique for logic synthesis and verification, based on Boolean Satisfiability (SAT). Leveraging the efficacy of SAT algorithms, Craig In...
John D. Backes, Marc D. Riedel
AAAI
2000
13 years 10 months ago
Towards a Logic-Based Theory of Argumentation
There are a number of frameworks for modelling argumentation in logic. They incorporate formal representation of individual arguments and techniques for comparing conflicting argu...
Philippe Besnard, Anthony Hunter
VMCAI
2010
Springer
14 years 6 months ago
Building a Calculus of Data Structures
Abstract. Techniques such as verification condition generation, preditraction, and expressive type systems reduce software verification to proving formulas in expressive logics. Pr...
Viktor Kuncak, Ruzica Piskac, Philippe Suter, Thom...
CIE
2006
Springer
14 years 14 days ago
Inverting Monotone Continuous Functions in Constructive Analysis
We prove constructively (in the style of Bishop) that every monotone continuous function with a uniform modulus of increase has a continuous inverse. The proof is formalized, and a...
Helmut Schwichtenberg
JCIT
2008
144views more  JCIT 2008»
13 years 8 months ago
Design Methodology of a Controller to Forecast the Uncertain Cardiac Arrest Using Fuzzy Logic Approach
The main objective of design methodology of a controller for forecasting cardiac arrest using fuzzy logic approach is to provide the prediction of period of life time for the pati...
Nalayini Natarajan, Wahida Banu