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136
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ETS
2007
IEEE
109views Hardware» more  ETS 2007»
15 years 8 months ago
Test Configurations for Diagnosing Faulty Links in NoC Switches
The paper proposes a new concept of diagnosing faulty links in Network-on-a-Chip (NoC) designs. The method is based on functional fault models and it implements packet address dri...
Jaan Raik, Raimund Ubar, Vineeth Govind
CSCW
2004
ACM
15 years 8 months ago
Towards dynamic collaboration architectures
In this paper, we introduce the concept of dynamically changing between centralized, replicated, and hybrid collaboration architectures. It is implemented by providing users a fun...
Goopeel Chung, Prasun Dewan
106
Voted
DAC
2008
ACM
16 years 3 months ago
An 8x8 run-time reconfigurable FPGA embedded in a SoC
This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...
Sumanta Chaudhuri, Sylvain Guilley, Florent Flamen...
ESWS
2008
Springer
15 years 4 months ago
SCARLET: SemantiC RelAtion DiscoveRy by Harvesting OnLinE OnTologies
Abstract. We present a demo of SCARLET, a technique for discovering relations between two concepts by harvesting the Semantic Web, i.e., automatically finding and exploring multipl...
Marta Sabou, Mathieu d'Aquin, Enrico Motta
CEFP
2007
Springer
15 years 8 months ago
From Interpretation to Compilation
Abstract. In this paper we sketch some experiments with the construction of a simple compiler for a high level intermediate lazy functional language, with C++ as a target language....
Jan Martin Jansen, Pieter W. M. Koopman, Rinus Pla...