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TCAD
2008
136views more  TCAD 2008»
13 years 10 months ago
A Geometric Programming-Based Worst Case Gate Sizing Method Incorporating Spatial Correlation
We present an efficient optimization scheme for gate sizing in the presence of process variations. Our method is a worst-case design scheme, but it reduces the pessimism involved i...
Jaskirat Singh, Zhi-Quan Luo, Sachin S. Sapatnekar
BMCBI
2005
77views more  BMCBI 2005»
13 years 10 months ago
Combining Affymetrix microarray results
Background: As the use of microarray technology becomes more prevalent it is not unusual to find several laboratories employing the same microarray technology to identify genes re...
John R. Stevens, R. W. Doerge
JCST
2007
151views more  JCST 2007»
13 years 10 months ago
Indexing Future Trajectories of Moving Objects in a Constrained Network
Abstract Advances in wireless sensor networks and positioning technologies enable new applications monitoring moving objects. Some of these applications, such as traffic managemen...
Ji-Dong Chen, Xiao-Feng Meng
JSAC
2007
180views more  JSAC 2007»
13 years 10 months ago
A Cross-Layer Approach for WLAN Voice Capacity Planning
— This paper presents an analytical approach to determining the maximum number of on/off voice flows that can be supported over a wireless local area network (WLAN), under a qua...
Yu Cheng, Xinhua Ling, Wei Song, Lin X. Cai, Weihu...
TVLSI
2008
187views more  TVLSI 2008»
13 years 10 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
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