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FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 10 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
JCM
2008
63views more  JCM 2008»
13 years 9 months ago
A Node Encoding of Torus Topology and Its Improved Routing Algorithm
With the feature size of semiconductor technology reducing and intellectual properties (IP) cores increasing, on chip communication architectures have a great influence on the perf...
Xiaoqiang Yang, Junmin Li, Huimin Du, Jungang Han
TISSEC
2008
235views more  TISSEC 2008»
13 years 9 months ago
SDAP: A Secure Hop-by-Hop Data Aggregation Protocol for Sensor Networks
Hop-by-hop data aggregation is a very important technique for reducing the communication overhead and energy expenditure of sensor nodes during the process of data collection in a...
Yi Yang, Xinran Wang, Sencun Zhu, Guohong Cao
WWW
2007
ACM
14 years 10 months ago
Toward expressive syndication on the web
Syndication systems on the Web have attracted vast amounts of attention in recent years. As technologies have emerged and matured, there has been a transition to more expressive s...
Christian Halaschek-Wiener, James A. Hendler
WWW
2005
ACM
14 years 10 months ago
Building adaptable and reusable XML applications with model transformations
We present an approach in which the semantics of an XML language is defined by means of a transformation from an XML document model (an XML schema) to an application specific mode...
Ivan Kurtev, Klaas van den Berg