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DATE
2006
IEEE
195views Hardware» more  DATE 2006»
14 years 1 months ago
Application specific instruction processor based implementation of a GNSS receiver on an FPGA
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
Götz Kappen, Tobias G. Noll
ECMDAFA
2010
Springer
138views Hardware» more  ECMDAFA 2010»
13 years 5 months ago
A UML 2.0 Profile to Model Block Cipher Algorithms
Abstract. Current mobile digital communication systems must implement rigorous operations to guarantee high levels of confidentiality and integrity during transmission of critical ...
Tomás Balderas-Contreras, Gustavo Rodr&iacu...
ICCD
1992
IEEE
126views Hardware» more  ICCD 1992»
13 years 11 months ago
High-Level State Machine Specification and Synthesis
Current synthesis methodologies based on hardwaredescription languages focus mainly on two distinct levels: behavior and register-transfer levels. In many practical cases, however...
Andreas Kuehlmann, Reinaldo A. Bergamaschi
EVOW
2011
Springer
12 years 10 months ago
Towards Procedural Strategy Game Generation: Evolving Complementary Unit Types
The Strategy Game Description Game Language (SGDL) is intended to become a complete description of all aspects of strategy games, including rules, parameters, scenarios, maps, and ...
Tobias Mahlmann, Julian Togelius, Georgios N. Yann...
AHS
2007
IEEE
262views Hardware» more  AHS 2007»
13 years 8 months ago
A Reed-Solomon Algorithm for FPGA Area Optimization in Space Applications
This work describes an algebraic based design strategy targeting area optimization in reconfigurable computer technology (FPGA). Area optimization is a major issue as smaller comp...
Gabriel Marchesan Almeida, Eduardo Augusto Bezerra...