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SPAA
1990
ACM
13 years 11 months ago
Hardware Speedups in Long Integer Multiplication
We present various experiments in Hardware/Software designtradeoffs met in speeding up long integer multiplications. This work spans over a year, with more than 12 different hardw...
Mark Shand, Patrice Bertin, Jean Vuillemin
ISLPED
1995
ACM
131views Hardware» more  ISLPED 1995»
13 years 11 months ago
Guarded evaluation: pushing power management to logic synthesis/design
The need to reduce the power consumption of the next generation of digital systems is clearly recognized. At the system level, power management is a very powerful technique and de...
Vivek Tiwari, Sharad Malik, Pranav Ashar
CIKM
2008
Springer
13 years 9 months ago
Large-scale, parallel automatic patent annotation
When researching new product ideas or filing new patents, inventors need to retrieve all relevant pre-existing know-how and/or to exploit and enforce patents in their technologica...
Milan Agatonovic, Niraj Aswani, Kalina Bontcheva, ...
CJ
2006
84views more  CJ 2006»
13 years 7 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
INTEGRATION
2006
82views more  INTEGRATION 2006»
13 years 7 months ago
On whitespace and stability in physical synthesis
In the context of physical synthesis, large-scale standard-cell placement algorithms must facilitate incremental changes to layout, both local and global. In particular, flexible ...
Saurabh N. Adya, Igor L. Markov, Paul G. Villarrub...