Double Patterning Lithography (DPL) is one of the few hopeful candidate solutions for the lithography for CMOS process beyond 45nm. DPL assigns the patterns less than a certain di...
The increase in the use of parallel distributed architectures in order to solve large-scale scientific problems has generated the need for performance prediction for both determi...
We present a framework for validating the compliance of a design with a given architecture. Our approach is centered on the concept of misinterpretations. These include missing be...
In this paper, a diversity generating mechanism is proposed for an Evolutionary Programming (EP) algorithm that determines the basic structure of Multilayer Perceptron classifiers ...
A number of works have investigated using tamper-proof hardware tokens as tools to achieve a variety of cryptographic tasks. In particular, Goldreich and Ostrovsky considered the ...
Vipul Goyal, Yuval Ishai, Amit Sahai, Ramarathnam ...