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CASES
2010
ACM
13 years 6 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
VEE
2005
ACM
140views Virtualization» more  VEE 2005»
14 years 2 months ago
Planning for code buffer management in distributed virtual execution environments
Virtual execution environments have become increasingly useful in system implementation, with dynamic translation techniques being an important component for performance-critical ...
Shukang Zhou, Bruce R. Childers, Mary Lou Soffa
ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
14 years 5 months ago
A code refinement methodology for performance-improved synthesis from C
Although many recent advances have been made in hardware synthesis techniques from software programming languages such as C, the performance of synthesized hardware commonly suffe...
Greg Stitt, Frank Vahid, Walid A. Najjar
LCTRTS
2009
Springer
14 years 3 months ago
Live-range unsplitting for faster optimal coalescing
Register allocation is often a two-phase approach: spilling of registers to memory, followed by coalescing of registers. Extreme liverange splitting (i.e. live-range splitting aft...
Sandrine Blazy, Benoît Robillard
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
14 years 2 months ago
Hardware atomicity for reliable software speculation
Speculative compiler optimizations are effective in improving both single-thread performance and reducing power consumption, but their implementation introduces significant compl...
Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, ...