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» Generalized cofactoring for logic function evaluation
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DAC
2003
ACM
14 years 8 months ago
Making cyclic circuits acyclic
Cyclic circuits that do not hold state or oscillate are often the most convenient representation for certain functions, such as arbiters, and can easily be produced inadvertently ...
Stephen A. Edwards
GECCO
2008
Springer
201views Optimization» more  GECCO 2008»
13 years 8 months ago
Advanced techniques for the creation and propagation of modules in cartesian genetic programming
The choice of an appropriate hardware representation model is key to successful evolution of digital circuits. One of the most popular models is cartesian genetic programming, whi...
Paul Kaufmann, Marco Platzner
FPGA
2007
ACM
163views FPGA» more  FPGA 2007»
14 years 1 months ago
Improved SAT-based Boolean matching using implicants for LUT-based FPGAs
Boolean matching (BM) is a widely used technique in FPGA resynthesis and architecture evaluation. In this paper we present several improvements to the recently proposed SAT-based ...
Jason Cong, Kirill Minkovich
CIKM
2006
Springer
13 years 11 months ago
SaLSa: computing the skyline without scanning the whole sky
Skyline queries compute the set of Pareto-optimal tuples in a relation, i.e., those tuples that are not dominated by any other tuple in the same relation. Although several algorit...
Ilaria Bartolini, Paolo Ciaccia, Marco Patella
FPGA
2006
ACM
129views FPGA» more  FPGA 2006»
13 years 11 months ago
Power-aware RAM mapping for FPGA embedded memory blocks
Embedded memory blocks are important resources in contemporary FPGA devices. When targeting FPGAs, application designers often specify high-level memory functions which exhibit a ...
Russell Tessier, Vaughn Betz, David Neto, Thiagara...