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GLVLSI
2008
IEEE
137views VLSI» more  GLVLSI 2008»
14 years 3 months ago
Phase-based cache reconfiguration for a highly-configurable two-level cache hierarchy
Phase-based tuning methodologies specialize system parameters for each application phase of execution. Parameters are varied during execution, as opposed to remaining fixed as in ...
Ann Gordon-Ross, Jeremy Lau, Brad Calder
CASES
2006
ACM
14 years 2 months ago
FlashCache: a NAND flash memory file cache for low power web servers
We propose an architecture that uses NAND flash memory to reduce main memory power in web server platforms. Our architecture uses a two level file buffer cache composed of a re...
Taeho Kgil, Trevor N. Mudge
ASPDAC
2004
ACM
158views Hardware» more  ASPDAC 2004»
14 years 11 days ago
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures
Abstract-- The power consumption of microprocessors has been increasing in step with the complexity of each progressive generation. In general purpose processors, this is primarily...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
IPPS
2002
IEEE
14 years 1 months ago
On Reliable and Scalable Peer-to-Peer Web Document Sharing
We propose a peer-to-peer Web document sharing technique, called “Browsers-Aware Proxy Server”. In this design, a proxy server connecting to a group of networked clients maint...
Li Xiao, Xiaodong Zhang, Zhichen Xu
CIKM
2008
Springer
13 years 10 months ago
A metric cache for similarity search
Similarity search in metric spaces is a general paradigm that can be used in several application fields. It can also be effectively exploited in content-based image retrieval syst...
Fabrizio Falchi, Claudio Lucchese, Salvatore Orlan...