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TAP
2010
Springer
102views Hardware» more  TAP 2010»
14 years 4 months ago
Generating High-Quality Tests for Boolean Circuits by Treating Tests as Proof Encoding
Abstract. We consider the problem of test generation for Boolean combinational circuits. We use a novel approach based on the idea of treating tests as a proof encoding rather than...
Eugene Goldberg, Panagiotis Manolios
MEMOCODE
2007
IEEE
14 years 5 months ago
Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
ITC
2003
IEEE
148views Hardware» more  ITC 2003»
14 years 4 months ago
HyAC: A Hybrid Structural SAT Based ATPG for Crosstalk
As technology evolves into the deep sub-micron era, signal integrity problems are growing into a major challenge. An important source of signal integrity problems is the crosstalk...
Xiaoliang Bai, Sujit Dey, Angela Krstic