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» Generating Object-Z Specifications from Use Cases
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ICCAD
2009
IEEE
87views Hardware» more  ICCAD 2009»
13 years 6 months ago
The synthesis of combinational logic to generate probabilities
As CMOS devices are scaled down into the nanometer regime, concerns about reliability are mounting. Instead of viewing nanoscale characteristics as an impediment, technologies suc...
Weikang Qian, Marc D. Riedel, Kia Bazargan, David ...
AMAI
2004
Springer
14 years 2 months ago
Using Automatic Case Splits and Efficient CNF Translation to Guide a SAT-solver when Formally Verifying Out-Of-Order Processors
The paper integrates automatically generated case-splitting expressions, and an efficient translation to CNF, in order to formally verify an out-of-order superscalar processor havi...
Miroslav N. Velev
DAC
1990
ACM
14 years 22 days ago
Timing Verification Using HDTV
In this paper, we provide an overview of a system designed for verifying the consistency of timing specifications for digital circuits. The utility of the system comes from the ne...
Alan R. Martello, Steven P. Levitan, Donald M. Chi...
TRIDENTCOM
2010
IEEE
13 years 6 months ago
How to Build Complex, Large-Scale Emulated Networks
Abstract. This paper describes AutoNetkit, an auto-configuration tool for complex network emulations using Netkit, allowing large-scale networks to be tested on commodity hardware....
Hung X. Nguyen, Matthew Roughan, Simon Knight, Nic...
KBSE
2002
IEEE
14 years 1 months ago
SeDiTeC - Testing Based on Sequence Diagrams
In this paper we present a concept for automated testing of object-oriented applications and a tool called SeDiTeC that implements these concepts for Java applications. SeDiTeC us...
Falk Fraikin, Thomas Leonhardt