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SBACPAD
2008
IEEE
170views Hardware» more  SBACPAD 2008»
14 years 2 months ago
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
James Poe, Chang-Burm Cho, Tao Li
EUROPAR
2004
Springer
14 years 1 months ago
Evaluating OpenMP Performance Analysis Tools with the APART Test Suite
The APART working group is developing the APART Test Suite (ATS) for evaluating (automatic) performance analysis tools with respect to their correctness – that is, their ability...
Michael Gerndt, Bernd Mohr, Jesper Larsson Trä...
DFT
2006
IEEE
203views VLSI» more  DFT 2006»
14 years 1 months ago
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
Ondrej Novák, Zdenek Plíva, Jiri Jen...
ASPLOS
2010
ACM
14 years 2 months ago
MacroSS: macro-SIMDization of streaming applications
SIMD (Single Instruction, Multiple Data) engines are an essential part of the processors in various computing markets, from servers to the embedded domain. Although SIMD-enabled a...
Amir Hormati, Yoonseo Choi, Mark Woh, Manjunath Ku...
SOFSEM
2010
Springer
14 years 4 months ago
Source Code Rejuvenation Is Not Refactoring
Programmers rely on programming idioms, design patterns, and workaround techniques to make up for missing programming language support. Evolving languages often address frequently ...
Peter Pirkelbauer, Damian Dechev, Bjarne Stroustru...