456 search results - page 81 / 92 » Generating high performance pruned FFT implementations |
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Interconnection plays an important role in performance and power of CMP designs using deep sub-micron technology. The network-on-chip (NoCs) has been proposed as a scalable and hi...
VEE
2005
ACM
14 years 2 months ago
2005
ACM
We present an optimized implementation of the linear scan register allocation algorithm for Sun Microsystems’ Java HotSpotTM client compiler. Linear scan register allocation is ...
HPDC
2000
IEEE
14 years 1 months ago
2000
IEEE
The BaBar experiment at the Stanford Linear Accelerator Center (SLAC) is designed to perform a high precision investigation of the decays of the B-meson produced from electron-pos...
CORR
2010
Springer
13 years 8 months ago
2010
Springer
The emergence of various technologies has since pushed researchers to develop new protocols that support high density data transmissions in Wide Area Networks. Many of these proto...
COMCOM
2002
13 years 8 months ago
2002
Abstract-We propose a new webserver architecture optimized for delivery of large, popular files. Delivery of such files currently pose a scalability problem for conventional conten...