647 search results - page 110 / 130 » Generation of BDDs from hardware algorithm descriptions |
ACMSE
2004
ACM
14 years 1 months ago
2004
ACM
SA_MetaMatch, a component of the Standards Advisor (SA), is designed to find relevant documents through matching indices of metadata and document content. The elements in the meta...
AAAI
2008
13 years 10 months ago
2008
We describe a method to improve detection of disease outbreaks in pre-diagnostic time series data. The method uses multiple forecasters and learns the linear combination to minimi...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
LCTRTS
2010
Springer
14 years 2 months ago
2010
Springer
Coarse Grain Reconfigurable Architectures (CGRAs) promise high performance at high power efficiency. They fulfil this promise by keeping the hardware extremely simple, and movi...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...