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» Generation of BDDs from hardware algorithm descriptions
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EUROMICRO
2000
IEEE
14 years 9 days ago
Concurrent Control Systems: From Grafcet to VHDL
The Automated Production Systems (APS) are composed of concurrent interacting entities. Then any model should exhibit parallel and sequential behaviours. The Grafcet is now well e...
Frédéric Mallet, Daniel Gaffé...
PPAM
2007
Springer
14 years 2 months ago
On Parallel Generation of Partial Derangements, Derangements and Permutations
The concept of a partial derangement is introduced and a versatile representation of partial derangements is proposed with permutations and derangements as special cases. The repre...
Zbigniew Kokosinski
ATAL
2008
Springer
13 years 10 months ago
A heads-up no-limit Texas Hold'em poker player: discretized betting models and automatically generated equilibrium-finding progr
We present Tartanian, a game theory-based player for headsup no-limit Texas Hold'em poker. Tartanian is built from three components. First, to deal with the virtually infinit...
Andrew Gilpin, Tuomas Sandholm, Troels Bjerre S&os...
SIPS
2006
IEEE
14 years 1 months ago
Automated Architectural Exploration for Signal Processing Algorithms
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winse...
ICES
2010
Springer
106views Hardware» more  ICES 2010»
13 years 5 months ago
The Use of Genetic Algorithm to Reduce Power Consumption during Test Application
Abstract. In this paper it is demonstrated how two issues from the area of testing electronic components can be merged and solved by means of a genetic algorithm. The two issues ar...
Jaroslav Skarvada, Zdenek Kotásek, Josef St...