647 search results - page 85 / 130 » Generation of BDDs from hardware algorithm descriptions |
PRDC
2006
IEEE
14 years 1 months ago
2006
IEEE
Dependable systems are usually designed with multiple instances of components or logical processes, and often possess symmetries that may be exploited in model-based evaluation. T...
3DIM
2005
IEEE
14 years 1 months ago
2005
IEEE
Our goal is the production of highly accurate photorealistic descriptions of the 3D world with a minimum of human interaction and increased computational efficiency. Our input is...
AGENTS
2000
Springer
14 years 8 days ago
2000
Springer
This paper presents a knowledge approach to designing team training systems using intelligent agents. We envision a computer-based training system in which teams are trained by pu...
ISPD
2012
ACM
12 years 3 months ago
2012
ACM
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
ICCAD
1999
IEEE
14 years 6 days ago
1999
IEEE
This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a ...