68 search results - page 5 / 14 » Generation of compact test sets with high defect coverage |
DAC
2006
ACM
14 years 8 months ago
2006
ACM
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
- We propose a dynamic test compaction procedure to generate high-quality test patterns for path delay faults. While the proposed procedure generates a compact two-pattern test set...
GLVLSI
2002
IEEE
14 years 13 days ago
2002
IEEE
This paper develops new techniques for detecting both stuck-open faults and resistive open faults, which result in increased delays along some paths. The improved detection of CMO...
ET
2002
13 years 7 months ago
2002
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
ICST
2010
IEEE
13 years 5 months ago
2010
IEEE
A Feature Model (FM) is a compact representation of all the products of a software product line. The automated extraction of information from FMs is a thriving research topic invo...