— Input-queued switches are used extensively in the design of high-speed routers. As switch speeds and sizes increase, the design of the switch scheduler becomes a primary challe...
Isaac Keslassy, Murali S. Kodialam, T. V. Lakshman...
Capturing RLCK circuit responses accurately with existing model order reduction (MOR) techniques is very expensive. Direct metrics for fast analysis of RC circuits exist but there...
— A significant research effort has been devoted in recent years to the design of simple and efficient scheduling policies for Input Queued (IQ) and Combined Input Output Queue...
Marco Ajmone Marsan, Paolo Giaccone, Emilio Leonar...
Higher integration densities, smaller feature lengths, and other technology advances, as well as architectural evolution, have made microprocessor cores exceptionally complex. Cur...
This paper presents a layout generation tool that aims to reduce the gap between electrical sizing and physical realization of high performance analog circuits. The procedural lay...